25 lines
483 B
Makefile
25 lines
483 B
Makefile
# build/Makefile
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CC = gcc
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CFLAGS = -Wall -I../include
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SRCDIR = ../src
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OBJDIR = ../obj
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BINDIR = ../build
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TARGET = clock
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# Gather all source files in src directory
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SOURCES = $(wildcard $(SRCDIR)/*.c)
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OBJECTS = $(patsubst $(SRCDIR)/%.c, $(OBJDIR)/%.o, $(SOURCES))
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all: $(TARGET)
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$(TARGET): $(OBJECTS)
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$(CC) $(CFLAGS) -o $(BINDIR)/$(TARGET) $(OBJECTS) -lm
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$(OBJDIR)/%.o: $(SRCDIR)/%.c
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$(CC) $(CFLAGS) -c $< -o $@
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clean:
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rm -f $(OBJDIR)/*.o $(BINDIR)/$(TARGET)
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.PHONY: all clean
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